Technical Report: Feedback-Based Generation of Hardware Characteristics

ABSTRACT In large complex server-like computer systems it is difficult to characterise hardware usage in early stages of system development. Many times the applications running on the platform are not ready at the time of platform deployment leading to postponed metrics measurement. In our study we seek answers to the questions: (1) Can we use a feedbackbased control system to create a characteristics model of a real production system? (2) Can such a model be sufficiently accurate to detect characteristics changes instead of executing the production application? The model we have created runs a signalling application, similar to the production application, together with a PIDregulator generating L1 and L2 cache misses to the same extent as the production system. Our measurements indicate that we have managed to mimic a similar environment regarding cache characteristics. Additionally we have applied the model on a software update for a production system and detected characteristics changes using the model. This has later been verified on the complete production system, which in this study is a large scale telecommunication system with a substantial market share

Utilizing Hardware Monitoring to Improve the Quality of Service and Performance of Industrial Systems

The drastically increased use of information and communications technology has resulted in a growing demand for telecommunication network capacity. The demand for radically increased network capacity coincides with industrial cost-reductions due to an increasingly competitive telecommunication market. We have addressed the capacity and cost-reduction problems in three ways. Our first contribution is a method to support shorter development cycles for new functionality and more powerful hardware. We reduce the development time by replicating the hardware usage of production systems in our test environment. Having a realistic test environment allows us to run performance tests at early design phases and therefore reducing the overall system development time. Our second contribution is a method to improve the communication performance through selective and automatic message compression. The message compression functionality monitors transmissions continuously and selects the most efficient compression algorithm. The message compression functionality evaluates several parameters such as network congestion level, CPU usage, and message content. Our implementation extends the communication capacity of a legacy communication API running on Linux where it emulates a legacy real-time operating system. In our third an final contribution, we implement a process allocation and scheduling framework to allow higher system performance and quality of service. The framework continuously monitors selected processes and correlate their performance to hardware usage such as caches, floating point unit and similar. The framework uses the performance-hardware correlation to minimize shared hardware resource congestion by efficiently allocate processes on multi-core CPUs. We have also designed a shared hardware resource aware process scheduler that makes it possible for multiple processes to co-exist on a CPU without affecting the performance of each other through hardware resource congestions. The allocation and scheduling techniques can be used to consolidate several functions on shared hardware thus reducing the system cost. We have implemented and evaluated our process scheduler as a new scheduling class in Linux. We have conducted several case studies in an industrial environment and verified all contributions in the scope of a large telecommunication system manufactured by Ericsson.%We have deployed all techniques in a complicated industrial legacy system with minimal impact. We show that we can provide a cost-effective solution, which is an essential requirement for industrial systems.ITS-EASYDependable Platforms for Autonomous systems and Contro

Utilizing Hardware Monitoring to Improve the Performance of Industrial Systems

The drastically increasing use of Information and Communications Technology has resulted in a growing demand for network capacity. In this Licentiate thesis, we show how to monitor, model and finally improve network performance for large industrial systems. We also show how to use modeling techniques to move performance testing to an earlier design phase, with the aim to reduce the total development time of large systems. Our first contribution is a low-intrusive method for long-term hardware characteristic measurements of production nodes located at customer sites. Our second contribution is a technique to mimic the hardware usage of a production environment by creating a characteristics model. The cloned environment makes function test suites more realistic. The goal when creating the model is to reduce the system development time by moving late-stage performance testing to early design phases thereby improving the quality of the test environment. The third and final contribution is a network performance improvement where we dynamically trade computational capacity for a message round-trip time reduction when there are CPU cycles to spare. We have implemented an automatic feedback controlled mechanism for transparent message compression resulting in improved messaging performance between interconnected network nodes. Our mechanism continuously evaluates eleven compression algorithms on message stream content and network congestion level. The message subsystem will use the compression algorithm that provides the lowest messaging time. If the message content or network load change, a new evaluation is performed. We have conducted several case studies in an industrial environment and verified all contributions on a large telecommunication system manufactured by Ericsson. System engineers frequently use the monitoring and modeling functionality for debugging purposes in production environments. We have deployed all techniques in a complicated industrial legacy system with minimal impact. We show that we can provide not only a solution but a cost-effective solution, which is an important requirement for industrial systems.ITS-EAS

Bandwidth Measurement using Performance Counters for Predictable Multicore Software

Memory contention is one of the largest sources of inter-core interference in statically partitioned multicore systems, and the contention reduces the overall performance of applications and causes unpredictable execution-times. A first step in achieving predictable execution is to accurately measure the amount of consumed memory bandwidth for each application. Such measurements can be used to track down bottlenecks, provide better partitioning among cores, and ultimately be used to arbitrate and police access to the memory bus. We propose to use hardware performance counters to continuously track the memory-bandwidth consumed by different applications executing in parallel. In this paper we describe ongoing efforts exploring suitable performance counters on core-level and on system-on-chip level for the 8-core Freescale P4080 processor. The aim is to accurately and efficiently track consumed memory bandwidth per application; with the final goal to use these measurements to improve predictability of multicore real-time software.Submitted for publication to the conference: “Emerging Technologies and Factory Automation (ETFA’12), Poland, September, 2012”This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible. </p